Hybrid operation MOS transistors are known and are advantageous notably for electrostatic discharge (ESD) protection applications. Those skilled in the art will be able, for example, to refer to the U.S. Patent Application Publication No. 2013/0141824 (incorporated by reference) which describes this type of transistor.
These transistors are produced on bulk substrates. Now, electrical simulations have shown (see, Galy, et al. “BIMOS transistor in thin silicon film and new solutions for ESD protection in FDSOI UTBB CMOS technology”, EUROSOI-ULIS 2015, 26-28 Jan. 2015, Bologne, Italy (incorporated by reference)) that there would be advantages from an electrical point of view in producing these hybrid operation transistors on a substrate of FDSOI type for an ESD protection application.
However, the very small thickness of the semiconductor film (typically of the order of 7 nm) does not make it possible to directly produce a contact land on an FDSOI substrate for this type of transistor.